ARM ARM7TDMI Instrukcja Użytkownika Pobierz pdf (Strona 9)

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3.2.6 Register Operand, Logical Shift Right by Register

The register value is shifted right by a value contained in a register. The C flag will be

updated with the last value shifted out of Rm unless the value in Rs is 0.

Syntax: <Rm>, LSR <Rs>

Example: CMP R0, R1, LSR R2

Encoding:

11 10 9 8 7 6 5 4 3 2 1 0

Rs 0 0 1 1 Rm

3.2.7 Register Operand, Arithmetic Shift Right by Immediate

The register value is arithmetically shifted right by an immediate value in the range 1-

32. The arithmetic shift fills from the left with the sign bit, preserving the sign of the

number. The C flag will be updated with the last value shifted out of Rm.

Syntax: <Rm>, ASR #<immediate>

Example: CMP R0, R1, ASR #7

Encoding:

11 10 9 8 7 6 5 4 3 2 1 0

shift_imm 1 0 0 Rm

3.2.8 Register Operand, Arithmetic Shift Right by Register

The register value is arithmetically shifted right by a value contained in a register. The

arithmetic shift fills from the left with the sign bit, preserving the sign of the number.

The C flag will be updated with the last value shifted out of Rm unless the value in Rs is

Syntax: <Rm>, ASR <Rs>

Example: CMP R0, R1, ASR R2

Encoding:

11 10 9 8 7 6 5 4 3 2 1 0

Rs 0 1 0 1 Rm

3.2.9 Register Operand, Rotate Right by Immediate

The register value is rotated right by an immediate value in the range 1-31. [A rotate

value of 0 in this instruction encoding will cause an RRX operation to be performed.]

The C flag will be updated with the last value shifted out of Rm.

Syntax: <Rm>, ROR #<immediate>

Example: CMP R0, R1, ROR #7

Encoding:

11 10 9 8 7 6 5 4 3 2 1 0

shift_imm 1 1 0 Rm

1 2 3 4 5 6 7 8 9 10 11 12 13 14 ... 42 43

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ARM ARM7TDMI Instrukcja Użytkownika Strona 9