ARM AMBA NIC-301 Dokumentacja Strona 142

  • Pobierz
  • Dodaj do moich podręczników
  • Drukuj
  • Strona
    / 178
  • Spis treści
  • BOOKMARKI
  • Oceniono. / 5. Na podstawie oceny klientów
Przeglądanie stron 141
Programmers Model
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 3-85
ID062813 Non-Confidential
Figure 3-59 shows the bit assignments.
Figure 3-59 System counter CNTV_CTL Register bit assignments
Table 3-84 shows the bit assignments.
PID0
The PID0 Register characteristics are:
Purpose System timer peripheral identification register 0 that enables you to read
system timer peripheral identification values.
Usage constraints This register is read-only.
Configurations Not applicable.
Attributes See Table 3-68 on page 3-76.
Figure 3-60 on page 3-86 shows the bit assignments.
31 0
0 00000 0 000000000000 0000 000000 00
0
Reserved
4321
IMSTAT
ISTAT
IMSK
EN
Table 3-84 System counter CNTV_CTL Register bit assignments
Bits Name Function
[31:4] - Reserved. Do not modify.
[3] IMSTAT Interrupt status after masking:
b0
Interrupt asserted.
b1
Interrupt not asserted.
The default is
b0
.
[2] ISTAT Interrupt status before masking:
b0
Interrupt asserted.
b1
Interrupt not asserted.
The default is
b0
.
[1] IMSK Mask interrupt:
b0
Mask interrupt.
b1
Unmask interrupt.
The default is
b0
.
[1] EN Enable timer:
b0
Timer enabled.
b1
Timer disabled.
Default
b0
.
Przeglądanie stron 141
1 2 ... 137 138 139 140 141 142 143 144 145 146 147 ... 177 178

Komentarze do niniejszej Instrukcji

Brak uwag