
Hardware Description
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 2-9
ID062813 Non-Confidential
2.3.5 System Bus (SB)
The SB connects 26 interrupt lines from motherboard peripherals to the Generic Interrupt
Controller (GIC) in the MPCore cluster in the test chip.
2.3.6 Configuration Bus (CB)
The CB connects the Daughterboard Configuration Controller to the MCC. The Daughterboard
Configuration Controller configures the OSCCLKs on the daughterboard and the
Cortex-A15_A7 test chip SCC registers. The Daughterboard Configuration Controller also
controls daughterboard resets and temperature monitoring. The CB connects the daughterboard
EEPROM directly to the MCC and enables automatic detection and identification of the
daughterboard at power-up or reset.
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