
Hardware Description
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 2-20
ID062813 Non-Confidential
A7_NVSOCRESET
Resets the interface logic between the A7 VCORE and VSOC domains.
A15_NVSOCRESET
Resets the interface logic between the A15 VCORE and VSOC domains.
See the following for more information on the internal resets:
• Cortex
®
-A7 MPCore
™
Technical Reference Manual
• Cortex
®
-A15 Technical Reference Manual.
When power-management is enabled in the
board.txt
file, the CA15 or CA7 cores must not
directly write to CFGREG6 or CFGREG11 because the Daughterboard Configuration
Controller controls this. Writing to these registers prevents the power-management interface
from functioning correctly.
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