
Programmers Model
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 3-6
ID062813 Non-Confidential
Chip-select Remap
SCC register bits CFGREG4[5:4] control whether CS0 or CS4 is addressed at address
0x00_0000_0000
. See Test chip SCC Register 4 on page 3-19.
Chip-select remap operates only when you map SMC to
0x00_0000_0000
.
The processor fetches its first instructions from address
0x00_0000_0000
, but the actual memory
read depends on the remapped memory region.
Memory remapping at power-on during run-time
You can configure the remap option at power-on or during run time as follows:
Remapping at power-on
Use the
board.txt
file if the remap option is required when the processor starts
from a reset. The
SCC: 0x000
entry in the
board.txt
file controls the settings for
the SCC register CFGREG4. See Versatile Express
™
Configuration Technical
Reference Manual.
Remapping during run time
Write directly to the SCC register CFGREG0 to change remapping after
power-on. See Test chip SCC Register 4 on page 3-19. See the Boot Monitor
sys_boot.s
file for an example of reconfiguring while running.
ARM recommends that you use the configuration file rather than directly writing to the control
registers. You must perform remapping during run-time with care. Do not do this when code is
running from the remapped area.
3.2.3 Overview of the memory map for the on-chip peripherals
Figure 3-2 on page 3-7 shows the on-chip peripheral memory map.
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