
Hardware Description
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 2-34
ID062813 Non-Confidential
2.8 Interrupts
This section describes the daughterboard interrupts. It consists of the following subsections:
• Overview of interrupts
• Interrupts on page 2-35.
2.8.1 Overview of interrupts
The Cortex-A15 MPCore test chip implements a Generic Interrupt Controller, GIC-400, with
32 internal interrupts and 160 external interrupts as follows:
Internal interrupts
The 32 internal interrupts connect internally between the cores and the GIC.
External interrupts
• The IOFPGA on the motherboard connects to 26 of the 160 external
interrupts through the SB.
• The Cortex-A15 cluster connect to 8 of the external interrupts.
• The Cortex-A7 cluster connect to 12 of the external interrupts.
• The test chip peripherals connect to 21 of the external interrupts.
• 65 external interrupts are reserved.
The CoreTile Express A15×2 A7×3 daughterboard does not send interrupts to the second
daughterboard. You can route interrupts to the CoreTile Express A15×2 A7×3 daughterboard
from the second daughterboard through the motherboard IOFPGA using SB2_INT[3:0] that
loops back to SB_IRQ. Table 2-11 on page 2-35 shows the interrupt mapping.
Figure 2-13 on page 2-35 shows an overview of the Cortex-A15_A7 MPCore test chip interrupt
signals.
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